Computer Aided Design (CAD) systems tend to be crosses between application-specific drawing packages, databases, modeling and rendering tools, and more. They tend to be big, domain-specific, and very useful if you need what they do.
Most of the CAD systems I've located have been developed at universities and have to do aspects of Electrical Engineering. Many of these systems are licensed, rather than freely distributed. Thus, you may have to fight your way through some paperwork before you gain access.
Al's Circuit Simulator (ACS) is Al Davis' general purpose circuit simulator. It performs nonlinear dc and transient analyses, fourier analysis, and ac analysis linearized at an operating point. It is fully interactive and command driven. It can also be run in batch mode or as a server. ACS can be found on ftp://cs.rit.edu/pub/acs/.
ALLIANCE is a complete set of CAD tools and portable libraries for research and education in digital VLSI design, developed at the MASI laboratory (Universite Pierre et Marie Curie, Paris France). It includes a VHDL compiler and simulator, logic synthesis tools, automatic place and route, DRC, extractor, functional abstraction and formal proof tools, etc. All the ALLIANCE cell libraries use a symbolic layout approach in order to provide process independence: CMOS process from 1.6 micron to 0.8 micron have been successfully targeted. ALLIANCE can be found on ftp://ftp-masi.ibp.fr/pub/cao-vlsi/alliance/.
Carafe is an Inductive Fault Analysis (IFA) tool, developed at UC Santa Cruz. It examines the layout of a circuit to determine the possible bridge and break faults that can occur due to single spot defects. The faults that are found by carafe can then be modeled and analyzed in terms of their effects on the circuit. Carafe is stored in encrypted form; you must send email to get a decryption key. Carafe can be found on ftp://ftp.cse.ucsc.edu/pub/carafe/.
Caltech's Chipmunk distribution contains tools for schematic capture, netlist creation, and analog and digital simulation, IC mask layout, extraction, and DRC, simple chip compilation, MOSIS fabrication request generation, netlist comparison, data plotting and PostScript graphics editing. These tools were used exclusively for the design and test of all the integrated circuits described in Carver Mead's book "Analog VLSI and Neural Systems". Chipmunk can be found on ftp://ftp.pcmp.caltech.edu/pub/chipmunk/".
FElt is a system for introductory level finite element analysis, developed at UC San Diego. It is primarily intended as a teaching tool for introductory type courses in finite elements - probably in the mechanical/structural/civil fields. In a command line environment, FElt uses an intuitive, straightforward input syntax to describe problems. It also includes a graphical user interface for workstations that allows the user to set-up the problem in a CAD-like environment. FElt can be found on ftp://cs.ucsd.edu/pub/felt/.
The Galaxy CAD System appears to be sort of a meta-CAD system, including significant room for extensions and prototyping of new CAD tools. It includes schematic capture and simulation of both low-level and high-level digital designs, capture and simulation of state diagrams and hardware flowcharts, synthesis of Intel EPLDs, and mapping of logic into physical boards (e.g., Wire-Wrap). Unfortunately, it appears to be available in binary form only, and the User Manual is only available in hard copy form. Galaxy can be found on ftp://eceserv0.ece.wisc.edu/pub/galaxy/.
Magic is the famous interactive editor for VLSI layouts. The University of California, Lawrence Livermore National Labs, Stanford University, and Digital Equipment Corporation (DEC) have all contributed greatly to its development. It is currently being maintained by DEC's Bob Mayo. Magic can be found on ftp://gatekeeper.dec.com/pub/DEC/magic/.
OCEAN is a comprehensive chip design package which was developed at Delft University of Technology, the Netherlands. It includes a full set of powerful tools for the synthesis and verification of semi-custom sea-of-gates and gate-array chips. OCEAN covers the back-end of the design trajectory: from circuit level, down to layout and a working chip. OCEAN can be found on ftp://donau.et.tudelft.nl/pub/ocean/.
Ptolemy, developed at UC Berkeley, is a hardware simulation environment workbench, performing circuit simulation, digital signal processing, and more. It is a unified software environment that extends the philosophy of mixed-mode circuit simulation up to the design and simulation of complex systems. Ptolemy can be found on ftp://ptolemy.eecs.berkeley.edu/pub/.
SPICE is a general-purpose circuit simulation program for nonlinear dc, nonlinear transient, and linear ac analyses. Circuits may contain resistors, capacitors, inductors, mutual inductors, independent voltage and current sources, dependent sources, transmission lines, switches, uniform distributed RC lines, and semiconductor devices. The FTP site contains only documentation and patches for SPICE; other CAD materials are contained under the parent directory. SPICE is available in ftp://ic.eecs.berkeley.edu/pub/spice3/.
[TimeBench] is a CAD tool for the design of real-time systems. Its main features include a hybrid graphical/textual design description notation, design experimentation through an embedded design interpreter and behavior visualization techniques, a performance analysis tool, and a code generation systems for Ada and C/JNX target environments (JNX is a real-time kernel for PCs). The FTP site contains documentation and binaries for Sun- systems. TimeBench is available in ftp://ftp.sce.carleton.ca/pub/timebench/.